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| CMT60N06 N-CHANNEL Logic Level Power MOSFET APPLICATION DC motor control UPS Class D Amplifier VDSS 60V RDS(ON) Typ. 15.8m ID 60A FEATURES Low ON Resistance Low Gate Charge Peak Current vs Pulse Width Curve Inductive Switching Curves PIN CONFIGURATION TO-220 SYMBOL D Front View GATE SOURCE DRAIN G S 1 2 3 N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS Rating Drain to Source Voltage (Note 1) Drain to Current Continuous Tc = 25J , VGS@10V Continuous Tc = 100J , VGS@10V Pulsed Tc = 25J , VGS@10V (Note 2) Continue Symbol VDSS ID ID IDM VGS PD dv/dt TJ, TSTG EAS TL TPKG IAS Value 60 60 43 241 20 150 1.0 4.5 -55 to 175 500 300 260 60 V W W/J V/ns J mJ J J A Unit V A Gate-to-Source Voltage Total Power Dissipation Derating Factor above 25J Peak Diode Recovery dv/dt (Note 3) Operating Junction and Storage Temperature Range Single Pulse Avalanche Energy L=144H,ID=40 Amps Maximum Lead Temperature for Soldering Purposes Maximum Package Body for 10 seconds Pulsed Avalanche Rating THERMAL RESISTANCE Symbol RJC RJA Parameter Junction-to-case Junction-to-ambient Min Typ Max 1.0 62 Units J /W J /W Test Conditions Water cooled heatsink, PD adjusted for a peak junction temperature of +175J 1 cubic foot chamber, free air 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 1 CMT60N06 N-CHANNEL Logic Level Power MOSFET ORDERING INFORMATION Part Number CMT60N06 Package TO-220 ELECTRICAL CHARACTERISTICS Unless otherwise specified, TJ = 25J . CMT60N06 Characteristic OFF Characteristics Drain-to-Source Breakdown Voltage (VGS = 0 V, ID = 250 A) Breakdown Voltage Temperature Coefficient (Reference to 25J , ID = 250 A) Drain-to-Source Leakage Current (VDS = 60 V, VGS = 0 V, TJ = 25J ) (VDS = 48 V, VGS = 0 V, TJ = 150J ) Gate-to-Source Forward Leakage (VGS = 20 V) Gate-to-Source Reverse Leakage (VGS = -20 V) ON Characteristics Gate Threshold Voltage (VDS = VGS, ID = 250 A) Static Drain-to-Source On-Resistance (VGS = 10 V, ID = 60A) Forward Transconductance (VDS = 15 V, ID = 60A) Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge (VGS = 10 V) Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward On-Voltage Reverse Recovery Time Reverse Recovery Charge (IS = 60 A, VGS = 0 V) (IF = 60A, VGS = 0 V, di/dt = 100A/s) Integral pn-diode in MOSFET ISM VSD trr Qrr 55 110 241 1.5 A V ns nC (Note 4) Dynamic Characteristics (VDS = 25 V, VGS = 0 V, f = 1.0 MHz) (VDS = 30 V, ID = 60 A, VGS = 10 V) (Note 5) Ciss Coss Crss Qg Qgs Qgd Resistive Switching Characteristics (VDD = 30 V, ID = 60 A, VGS = 10 V, RG = 9.1) (Note 5) td(on) trise td(off) tfall IS 12.1 64 69 39 60 ns ns ns ns A 1430 420 88 37.7 8.4 9.8 pF pF pF nC nC nC gFS (Note 4) RDS(on) 15.8 36 18 S m VGS(th) 1.0 2.0 3.0 V IGSS -100 nA IGSS IDSS 25 250 100 nA A G VDSS/TJ 0.069 mV/J VDSS 60 V Symbol Min Typ Max Units Source-Drain Diode Characteristics 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 2 CMT60N06 N-CHANNEL Logic Level Power MOSFET Note 1: TJ = +25J to +175J Note 2: Repetitive rating; pulse width limited by maximum junction temperature. Note 3: ISD = 60A, di/dt <100A/s, VDD < BVDSS, TJ = +175J Note 4: Pulse width < 250s; duty cycle<2% Note 5: Essentially independent of operating temerpature. 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 3 CMT60N06 N-CHANNEL Logic Level Power MOSFET Duty Cycle Figure 1. Maximum Effective Thermal Impedance, Junction-to-Case 1.000 50% 20% 10% ZJC, Thermal Impedance 0.100 5% 2% 1% PDM t1 t2 NOTES: DUTY FACTOR: D=t1/t2 PEAK TJ=PDM x ZJC x RJC+TC 0.010 single pulse 0.001 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 tp, Rectangular Pulse Duration (s) Figure 2. Maximum Power Dissipation vs Case Temperature Figure 3. Maximum Continuous Drain Current vs Case Temperature 70 60 50 40 30 20 10 0 25 50 75 100 125 150 175 25 50 75 100 125 150 175 PD, Power Dissipation (W) 140 100 80 60 40 20 0 TC, Case Temperature (oC) ID, Drain Current (A) 120 TC, Case Temperature (oC) Figure 4. Typical Output Characteristics 220 200 180 PULSE DURATION = 250 S DUTY CYCLE = 0.5% MAX TC = 25 oC Figure 5. Typical Drain-to-Source ON Resistance vs Gate Voltage and Drain Current 50 45 VGS = 15V ID, Drain Current (A) 140 120 100 80 60 40 20 0 0 5 VGS = 8V ON Resistance (m) 160 VGS = 10V RDS(ON), Drain-to-Source 40 35 30 25 20 15 ID = 14A ID = 28A ID = 55 A VGS = 6V VGS = 5V VGS = 4.5V VGS = 4V VGS = 3.5V VGS = 3V PULSE DURATION = 250 S DUTY CYCLE = 0.5% MAX o TC = 25 C 10 3 4 5 6 7 8 9 10 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 4 CMT60N06 N-CHANNEL Logic Level Power MOSFET Figure 6. Maximum Peak Current Capability 10000 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES o ABOVE 25 C DERATE PEAK CURRENT AS FOLLOWS: I = I 25 150 - T C ---------------------125 IDM, Peak Current (A) 1000 100 10 1 VGS = 10V 1E-6 10E-6 100E-6 1E-3 10E-3 100E-3 1E+0 10E+0 tp, Pulse Width (s) Figure 7. Typical Transfer Characteristics Figure 8. Unclamped Inductive Switching Capability 1000 ID, Drain-to-Source Current (A) 40 35 30 25 20 15 10 5 0 IAS, Avalanche Current (A) PULSE DURATION = 250 s DUTY CYCLE = 0.5% MAX VDS = 10 V If R 0: tAV= (L/R) ln[(IASxR)/(1.3BVDSS-VDD)+1] If R= 0: tAV= (LxIAS)/(1.3BVDSS-VDD) R equals total Series resistance of Drain circuit 100 STARTING TJ = 25 oC +175 oC +25oC -55oC 10 STARTING TJ = 150 oC 1 1E-6 10E-6 100E-6 1E-3 10E-3 100E-3 1.5 2.0 2.5 3.0 3.5 4.0 VGS, Gate-to-Source Voltage (V) tAV, Time in Avalanche (s) Figure 9. Typical Drain-to-Source ON Resistance vs Drain Current Figure 10. Typical Drain-to-Source ON Resistance vs Junction Temperature 2.5 RDS(ON), Drain-to-Source ON Resistance (m) 50 RDS(ON), Drain-to-Source Resistance (Normalized) 40 PULSE DURATION = 10 s DUTY CYCLE = 0.5% MAX TC=25C 2.0 30 1.5 20 VGS=10V 1.0. 10 0 50 100 150 0.5 -75 -50 -25 0 25 PULSE DURATION = 250 s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 15A 200 250 50 75 100 125 150 175 ID, Drain Current (A) TJ, Junction Temperature (oC) 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 5 CMT60N06 N-CHANNEL Logic Level Power MOSFET Figure 11. Typical Breakdown Voltage vs Junction Temperature Figure 12. Typical Threshold Voltage vs Junction Temperature 1.2 BVDSS, Drain-to-Source Breakdown Voltage (Normalized) 1.20 VGS(TH), Threshold Voltage (Normalized) 1.15 1.10 1.05 1.00 0.95 0.90 -75 -50 -25 0.0 25 50 75 VGS = 0V ID = 250 A 100 125 150 175 1.1 1.0 0.9 0.8 0.7 0.6 0.5 VGS = VDS ID = 250 A -75 -50 -25 0.0 25 75 100 125 150 175 Temperature (oC) 50 TJ, Junction Temperature (oC) TJ, Junction Figure 13. Maximum Forward Bias Safe Operating Area 1000 3000 OPERATION IN THIS AREA MAY BE LIMITED BY RDS(ON) Figure 14. Typical Capacitance vs Drain-to-Source Voltage VGS = 0V, f = 1MHz Ciss = Cgs + Cgd Coss Cds + Cgd Crss = Cgd ID, Drain Current (A) 10s C, Capacitance (pF) 2500 2000 1500 1000 500 0 Ciss 100 100 10 TJ = MAX RATED, TC = 25 oC Single Pulse 1.0m 10ms Coss 1 DC Crss 1 10 100 0.01 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain Voltage (V) Figure 15. Typical Gate Charge vs Gate-to-Source Voltage Figure 16. Typical Body Diode Transfer Characteristics VGS, Gate-to-Source Voltage (V) ISD, Reverse Drain Current (A) 12 10 8 6 4 2 0 0 5 10 15 20 25 30 ID = 59A VDS=45V VDS=30V VDS=15V 180 160 140 120 100 80 60 40 20 0 0.3 0.5 0.7 0.9 1.1 VGS = 0V 150 oC 25 oC -55 oC 35 40 1.3 QG , Total Gate Charge (nC) VSD, Source-to-Drain Voltage (V) 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 6 CMT60N06 N-CHANNEL Logic Level Power MOSFET PACKAGE DIMENSION TO-220 D A c1 F E PIN 1: GATE PIN 2: DRAIN PIN 3: SOURCE E1 A A1 L1 b b1 c c1 D L E E1 e e1 F L b1 e1 e b A1 c Side View L1 Front View 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 7 CMT60N06 N-CHANNEL Logic Level Power MOSFET IMPORTANT NOTICE Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to discontinue any integrated circuit product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. A few applications using integrated circuit products may involve potential risks of death, personal injury, or severe property or environmental damage. CMC integrated circuit products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. Use of CMC products in such applications is understood to be fully at the risk of the customer. In order to minimize risks associated with the customer's applications, the customer should provide adequate design and operating safeguards. HsinChu Headquarter 5F-1, No. 11, Park Avenue II, Science-Based Industrial Park, HsinChu City, Taiwan T E L : +886-3-567 9979 F A X : +886-3-567 9909 Sales & Marketing 11F, No. 306-3, SEC. 1, Ta Tung Road, Hsichih, Taipei Hsien 221, Taiwan T E L : +886-2-8692 1591 F A X : +886-2-8692 1596 2004/05/28 Preliminary rev.0.1 Champion Microelectronic Corporation Page 8 |
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